Core voltage of 1.65 volts for Duron 650MHz - 950MHz

• The industrys first nine-issue, superpipelined, superscalar x86 processor microarchitecture designed for high clock frequencies

• Multiple x86 instruction decoders

• Three out-of-order, superscalar, fully pipelined floating-point execution units, which execute all x87 (floating-point), MMX and 3DNow! instructions

• Three out-of-order, superscalar, pipelined integer units

• Three out-of-order, superscalar, pipelined address calculation units

• 72-entry instruction control unit

• Advanced dynamic branch prediction

• Enhanced 3DNow! technology with new instructions to enable improved integer math calculations for speech or video encoding and improved data movement for internet plug-ins and other streaming applications

    200-MHz AMD Duron system bus (scalable beyond 400 MHz) enabling leading-edge system bandwidth for data movement-intensive applications

    High-performance cache architecture featuring an integrated 128-Kbyte L1 cache and a 16-way, on-chip 64-Kbyte L2 cache